SoC Design Verification Engineer
Job Description
Business group
Key Responsibilities
- Perform functional verification and emulation validation of integrated SoCs to ensure designs meet specifications.
- Develop scalable and reusable block, subsystem, and SoC verification plans, test benches, and environments.
- Execute verification plans, analyze system simulation models, and debug power and performance issues.
- Root-cause failure issues and implement corrective measures in the pre-silicon environment.
- Collaborate with architects, RTL developers, post-silicon teams, and physical design experts to enhance verification.
- Document test plans and drive technical reviews with design and architecture teams.
- Conduct regression and debug tests to integrate security activities and ensure comprehensive coverage.
- Maintain and improve verification infrastructure and methodology, absorbing learnings from post-silicon validations.
Qualifications
Minimum Qualifications
- Master's degree in Electrical Engineering, Computer Science or Computer Engineering
- +6 months of experience in Silicon Design and/or Validation/Verification methodologies and tools.
Preferred Qualifications
- Experience in design verification for complex IPs and SoCs.
- Knowledge of UVM/SystemVerilog constrained-random coverage-based design verification methodologies.
- Familiarity with the complete verification lifecycle, including test plan creation, bug debugging, and coverage closure.
- Skills in developing validation test suites and driving continuous improvement into existing methodologies.
- Understanding of cache coherency principles in multiprocessor SoCs and layered protocols.
- Proficiency in scripting languages for automation purposes.
- Strong debugging skills and ability to independently resolve technical issues.
- Experience with Xeon CPU pre-silicon, emulation validation, or post-silicon validation.
Join us to innovate, learn, and make a meaningful impact in Intel's transformative journey to create world-changing technology.
Job Type
Shift
Primary Location
Additional Locations
Posting Statement
Benefits
Work Model for this Role
This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.The application window for this job posting is expected to end by 11/05/2026
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Not included in the source posting: about the role.
Skills
Who can apply
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