Senior SoC Design Engineer — RTL & Verification
Silicon Labs Careers
SingaporePosted Discovered via the company's careers siteMatch locked
Full-timeEngineering Jobs
About the role
Silicon Labs seeks a senior engineer to design block architectures for digital circuits and to drive SoC integration across cross-functional teams. You will implement RTL, verify IP blocks, and contribute to the development of mixed-signal verification and firmware validation for edge connectivity SoCs. Responsibilities include architectural design, IP integration, and documentation for reference
Not included in the source posting: about the role, what you'll do, qualifications, benefits.
Skills
soc
Who can apply
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