Senior Design Verification (DV) Engineer - Taipei/Hsinchu
About the role
Our Values
About the role
About the role
About the role
About the role
What you'll do
- Develop, optimize, and verify digital silicon IP using an existing C or Python model
- Create and maintain specifications, block diagrams, and detailed documentation/user guides
- Characterize the performance of digital silicon IP using industry standard tools and flows, including FPGA simulation and emulation
Qualifications
- At least 10 years of experience in Design Verification
- Experience leading a team of Design Verification Engineers
- Bachelors/Master's degree in Electrical Engineering
- Experience with Synopsys tools and advanced node processes (below 12nm) is preferred
- Startup experience is preferred
Bolt is committed to building a diverse and inclusive environment in which we recognize and value each other's differences as well as fostering a culture that promotes its core values: Professionalism, Integrity, and Respect. As an equal opportunity employer, all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, genetic information, national origin, age, disability, or status as a protected veteran. Originally posted on Himalayas
Not included in the source posting: about the role, benefits.
Skills
Who can apply
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