Principal Engineer – Static Timing Analysis (STA)
TYLsemi
Bangalore, KarnatakaPosted Discovered via the company's careers siteMatch locked
Full TimeEngineering Jobs
About the role
Role Overview We are seeking a highly experienced Principal Engineer - STA to lead timing analysis and signoff activities for advanced ASIC/SOC designs. The role requires deep expertise in static timing analysis methodologies, timing closure strategies, and signoff convergence across complex multi-clock, multi-voltage, and high-performance designs. The ideal candidate will provide technical leader
Not included in the source posting: about the role, what you'll do, qualifications, benefits.
Skills
soc
Who can apply
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