Dry Etch - SMTS, PD, Advance NAND

. A SMT S Dry Etch Engineer is a senior individual contributor responsible for defining, developing, and transferring advanced dry etch processes for Micron NAND technologies. You will work directly with process integration and other process areas such as Wet Etch, CVD, Diffusion, Metals, Lithography & CMP . You will work on state of the art and best in class dry etch chambers & own the process roadmap to meet program and yield goals. Your responsibilities include, but not limited to:

Leading Dry Etch technology and critical module development

• The SMTS Dry Etch Engineer owns key NAND dry etch process levels and modules, translating technology challenges into executable roadmaps for N, N+1, and N+2 nodes.

• Serve as the primary Dry Etch representative in program and module meetings for owned process areas.

• Drive multi-functional execution across T echnology Development, Process Integration and Manufacturing.

• Develop and innovate dry etch processes to meet structural and electrical specifications for advanced NAND devices.

• Lead First-Of-a-Kind (FOAK) dry etch process development, including recipe architecture, EPD strategy, control plans, and integration alignment.

• Establish tool redundancy, run-to-run controls, and E3 monitors to improve process robustness and manufacturability.

• Independently meet P rocess maturity , CSPEC, SPC, and qual criteria and timelines for owned process levels.

• Provide clear technical status and risk updates to program stakeholders .

• Collaborate with equipment and supplier teams to define and implement process-level hardware roadmaps.

• Apply model-based and data-driven problem solving to resolve complex yield, defectivity, and integration issues.

• Contribute towards Technical Leadership Program

• Act as a recognized technical expert within Dry Etch for owned process areas.

• Mentor MTS engineers, interns, and early-career staff on technical problem solving, data analysis, and plasma etch fundamentals.

• Participate in Micron patent programs, technical seminars, and knowledge-sharing forums.

• Continuously develop technical breadth and depth in dry etch technology and adjacent process areas.

• Solid presentation skills in executive meetings. Present process and technology roadmaps for current and future technology nodes .

• Comfortable in influencing other process areas technology roadmaps .

• Demonstrated aptitude for research and development environment

• 1 2 - 15 years' experience in dry etch process development in R&D (NAND, DRAM or Logic) transferring to manufacturin g. Of which 7-10 years in memory products such as NAND, and DRAM

• In-depth k nowledge of plasma physics, plasma chemistry, transport or surface phenomena gained through experience and/or coursework

• Demonstrated leadership in problem solving. Experience in managing technical projects

• Understanding various types of plasma dry etch reactors (e.g., RF sources, chemistries)

• Expertise in statistical process control and analysis

• Experience in solving scalability problems of deep high aspect ratio silicon/dielectric etches with a fundamental understanding of advanced conventional and unconventional (tailored) pulsing schemes

• Proven ability to independently drive technical execution and influence multi-functional teams.

• Strong computer skills, including MS Office, and SAS software like JmP and similar

• Candidates having AI develop ing and coding capability could be preferred .

• PhD (Chemical, Mechanical, Electrical, Material Science, Physics, Chemical physics, Chemistry, Semiconductor engineering or relevant majors) with at least 12 years of relevant dry etch process development experience

• BS/MS (Chemical, Mechanical, Electrical, Material Science, Physics, Chemical Physics, Chemistry, Semiconductor engineering or relevant majors) at least 1 5 years of relevant dry etch process development experience