CPU Design Verification Engineer

Performs functional verification of CPU logic to ensure design will meet specification requirements. Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to CPU microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with CPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of architecture and microarchitecture features of the CPU being designed actively.

Bachelor's or Master's degree in Electrical or Electronics Engineering, Computer Engineering, or any related field. Good knowledge in CPU architecture and Computer System Experience with System Verilog and UVM. Experience with scripting (i.e PERL, Phyton) Familiar with verification tools and methodologies. Excellent problem-solving and debugging skills. Effective communication and collaboration abilities. Self-motivated and able to work effectively in a dynamic, fast-paced environment.

College Grad

Shift 1 (Malaysia)

Malaysia, Penang

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A