Staff Analog Mixed-Signal Circuit Design Engineer
Brightecs Innovation Pte Ltd
SingaporePosted about 1 month agoDiscoveredMatch locked
contractEngineering Jobs
About the role
- Advanced CMOS PLL architecture definition, device level design and verification. 3. Lead layout implementation and testing. 4. Achieve industry leading jitter, noise and spur performance. 5. Architecture and system level design. Architecture choice-based noise/jitter/spur spec (optimal architecture - integer/Fraction/SS/MDLL etc.) Derive system parameters (Loop BW, Noise margin, noise TF, spur
Not included in the source posting: about the role, what you'll do, qualifications, benefits.
Skills
matlab
Who can apply
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