(Sr./Staff) Design Verification Engineer
OMNIVISION
SingaporePosted 29 days agoDiscoveredMatch locked
Full-timeIT Jobs
About the role
Description: As design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits - developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification. The goal is simple - to achieve zero-defect with the best
Not included in the source posting: about the role, what you'll do, qualifications, benefits.
Skills
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Who can apply
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