Senior Silicon Product Methodology Engineer

• Own end-to-end manufacturing methodology strategy, defining organization-wide standards adopted across teams, products, and future generations, and shaping how manufacturing issues are screened, debugged, and closed.
• Translate system specs and product POR into DFP requirements, test content, coverage, flows, and testability requirements, and maintain the DFP roadmap across infrastructure planning, execution readiness, and sign-off alignment.
• Partner multi-functionally to implement test content, debug hooks, and screening improvements, and drive alignment on manufacturability, test time, binning strategies, and cost-versus-coverage trade-offs.
• Turn incomplete yield, coverage, and correlation issues into hypothesis trees, measurement plans, and executable paths to closure.
• Define data and analytics frameworks to support yield analysis ,anomaly detection, and continuous improvement.
• Lead methodology strategy and DFP documentation as the single source of truth and feed findings into future methodologies , reusable methods, and production decisions.
• Create production-standard test methods, analytics systems, and debug frameworks that become durable artifacts adopted by engineering teams across products and future generations.
• Build secure, traceable, and validated AI-assisted workflows for analysis, debug, documentation, and methodology automation, with human oversight for critical engineering judgments.

• BS/MS in Electrical Engineering, Computer Engineering, or related field (or equivalent experience)
• 8+ years in silicon post‑silicon validation and/or high‑volume manufacturing test for complex SoCs, GPUs, CPUs, or similar.
• Hands‑on experience with test content bring‑up, limit setting, correlation to characterization, and yield/coverage optimization, and prior ownership of manufacturing test strategy from early planning through ramp to QS/production.
• Proficiency with scripting and data analysis (e.g., Python, MATLAB, R, SQL) for test data analytics, limit tuning, and yield/debug analysis.
• Demonstrated ability to frame ambiguous manufacturing problems, define evidence-driven trade-offs, and drive cross-functional alignment and closure around plans, dependencies, and sign-off criteria.
• Excellent communication skills and comfort authoring structured technical documents and test plans used by global manufacturing and validation teams.
• Strong AI-enabled skills and thinking, using AI to accelerate analysis, exploration, and documentation while maintaining rigor, originality, engineering judgment, clear validation guardrails, and measurable workflow impact.
• Prior ownership of manufacturing test strategy for a major silicon product (e.g., GPU/SoC/CPU) from early planning through ramp to QS/production.
• Track record creating reusable test methods, analytics frameworks, or debug tools adopted across teams, products, or programs.

• Build production AI-assisted validation workflows with evaluation, observability, and guardrails, and drive measurable adoption across engineering teams
• Proof of work: shipped manufacturing test methods, debug systems, analytics platforms, patents, or published technical works.
• Share methods, tools, or workflows that become durable team standards and elevate engineering efficiency while maintaining technical rigor.

With competitive salaries and a generous benefits package, NVIDIA is widely considered one of the world's most desirable technology employers. We welcome you to join our team, which consists of some of the hardest-working people in the world, working together to promote rapid growth. Are you passionate about joining a best-in-class team supporting the latest in GPU and AI technology? If so, we want to hear from you.