Senior/Principal SoC Verification Engineer — UVM & SystemVerilog
manpower staffing services pte ltd
SingaporePosted 26 days agoDiscoveredMatch locked
Full-time3+ years expEngineering Jobs
About the role
NSING, part of Nations Technologies Group, Singapore, is seeking a SoC Design Verification Engineer to join our Singapore R&D Center. You will develop verification plans, build test benches with SystemVerilog and UVM, write and debug test cases, analyze coverage, and mentor junior engineers as part of a cross-functional team. Requirements include a Bachelor's or Master's in Electrical/Computer Eng
Not included in the source posting: about the role, what you'll do, qualifications, benefits.
Skills
soc
Who can apply
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