Senior DFT Engineer - Post Silicon
About the role
What You’ll Be Doing
- Drive post-silicon enablement of DFT capabilities from initial silicon bring-up through production ramp and lifecycle support.
- Develop data-driven approaches to analyze test results, quality indicators, yield behavior, and test efficiency; translate findings into practical technical recommendations.
- Influence DFT architecture and implementation by communicating post-silicon requirements early with clear metrics/what-if analysis.
- Define and improve methodologies for silicon bring-up, failure analysis, test-content validation, and production deployment.
- Help productize new DFT capabilities by establishing scalable flows, validation criteria, debug procedures, and documentation.
- Contribute to modeling and analysis that supports test-time optimization, quality improvement, yield learning, test power.
- Partner across design, product development, and test teams to align pre-silicon trade-offs with post-silicon execution.
What We Need To See
- BSEE (or equivalent experience) with 8+ years or MS with 6 years of experience in related field.
- Solid understanding of DFT concepts, silicon test, and the relationship between design implementation, test content, and post-silicon behavior.
- Experience with silicon bring-up, debug, validation, production test, or engineering analysis of semiconductor devices.
- Ability to analyze complex datasets and use statistical or analytical approaches to identify trends, isolate issues, and support engineering decisions.
- Familiarity with automated test environments and test-program flows.
- Understanding of semiconductor fundamentals, including device behavior, process variation, and the impact of operating conditions on silicon results.
- Strong written and oral communication skills, with an ability to collaborate effectively across technical disciplines.
Ways To Stand Out From The Crowd
- Experience moving a silicon feature, test capability, or validation flow from development through production deployment.
- Working knowledge of core DFT features - including scan, ATPG, and MBIST - together with silicon characterization and manufacturing test.
- Experience developing scalable engineering workflows, automation, dashboards, or analysis tools.
Our technology has no boundaries! NVIDIA is building the world's most groundbreaking and state of the art compute platforms for the world to use. It's because of our work that scientists, researchers and engineers can advance their ideas. At its core, our visual computing technology not only enables an outstanding computing experience, but it is also energy efficient! We pioneered a supercharged form of computing loved by the most demanding computer users in the world - scientists, designers, artists, and gamers.
NVIDIA offers highly competitive salaries and a comprehensive benefits package. We have some of the most brilliant and talented people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to hear from you!
#LI-Hybrid
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits .
Applications for this job will be accepted at least until October 5, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
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Skills
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