New Graduate Engineer, Silicon Engineering
About the role
NEW GRADUATE ENGINEER, SILICON ENGINEERING
RESPONSIBILITIES
- ASIC/FPGA Design & Verification
- Participate in all phases of ASIC/FPGA design and verification flows
- Contribute towards design architecture, RTL implementation and/or verification, and emulation
- Bring-up and validate ASICs and FPGAs in the lab (write embedded software using C/C++ and/or Python)
- Hands-on self-starter who can execute the steps required to fully verify a complex digital design
- RF/Analog IC Design
- Simulate and model RFIC systems at high level and work with system architects, modem/DSP and ASIC engineers to partition functions between hardware and software domains
- Derive specifications for the RFIC subsystems and circuits
- Develop RF/microwave circuits in state-of-the-art SiGe or CMOS processes
- Perform IC floor planning and layout
- Digital Signal Processing
- Develop RTL designs using SystemVerilog, with emphasis on DSP and digital communication system blocks (frontend, physical layer, link layer, error correction, etc.)
- Verify DSP blocks against fixed-point MATLAB model, work in collaboration with systems engineers
- Physical Design
• Perform synthesis and physical implementation steps (synthesis, floor planning, place and route, timing/noise analysis, physical verification, electromigration, voltage drop, logic equivalency and other signoff checks)
- Develop/improve physical design methodologies and automation scripts for various implementation steps
- Participate in silicon tapeouts in advanced technology nodes for future Starlink SOCs
BASIC QUALIFICATIONS
- Graduating with a bachelor's degree, master's degree or PhD in 2026 or 2027
- Bachelor's degree in an engineering discipline, mathematics or physics
- Experience working with ASIC, SOC, FPGA, RFIC, or MMIC
PREFERRED SKILLS AND EXPERIENCE
- Understanding of computer architecture
- Experience in one or more of the following areas:
- Analog or digital CMOS integrated circuit design and/or physical design
- SystemVerilog, Verilog, VHDL or C/C++
• Scripting languages, e.g. Python for automation
- Object-oriented programming
• Simulation tools such as ADS, Spectre, HFSS or Momentum
- RTL design, chip bring-up, verification, and/or post-silicon validation experience
- Digital signal processing
ADDITIONAL REQUIREMENTS
- Ability to work extended hours and weekends as necessary to meet critical project milestones
COMPENSATION AND BENEFITS
ITAR REQUIREMENTS
- To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here .
SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX's Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com .
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