Memory Layout Engineer
Capgemini Engineering
Bangalore, KarnatakaPosted 29 days agoDiscoveredMatch locked
Full-time3+ years expEngineering Jobs
About the role
Job Location: Bangalore This role is for a Memory Layout Engineer with 3-7 years of experience to design and develop memory blocks for integrated circuits (ICs). You will be responsible for creating efficient memory layouts that meet performance, power, and area constraints. Responsibilities: Design memory layouts for various building blocks including: Bit cell array Row decoder Column decoder Sen
Not included in the source posting: about the role, what you'll do, qualifications, benefits.
Who can apply
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