RTL Design Engineer
The Role and Impact
Key responsibilities will include but not limited to
- Design and implement logic for CPU features using register transfer level (RTL) coding.
- Optimize logic designs to meet power, performance, area, and timing goals.
- Collaborate on defining architectural and microarchitectural features of the CPU.
- Review and contribute to verification plans to ensure design correctness.
- Resolve and implement solutions for failing RTL tests to achieve feature accuracy.
Behavioral traits that we are looking for
- Collaborate effectively across teams and disciplines.
- Approaches technical challenges with strong analytical and problem-solving skill.
- Show curiosity and continuous learning mindset.
- Can adapt to changing priorities in a dynamic environment.
- Communicate technical concepts clearly to diverse audiences.
Why Join Intel?
At Intel, you will work on technologies that impact billions of devices around the world. This role provides an opportunity to contribute to cutting-edge CPU development, learn from industry-leading engineers, and grow your skills in RTL design, processor architecture, and semiconductor engineering. We are committed to fostering a collaborative and inclusive environment where innovation, continuous learning, and technical excellence drive success.
Intel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life.
- See Intel Benefits for more details.
Qualifications
Minimum Qualifications and Experience
:
Bachelor's degree in a Electrical/Computer Engineering or related field 3+ months of educational or work experience . OR a Master's degree in the same field.
In addition, you must have 3+ months of educational or work experience in the following:
- RTL design using System Verilog.
- CPU architecture fundamentals and digital design principles.
Preferred Qualifications and Experience
:
- Familiarity with microarchitecture fundamentals and logic design optimization techniques.
- Familiarity with timing analysis, timing closure, and performance optimization of digital designs.
Job Type
Shift
Primary Location
Posting Statement
Benefits
Work Model for this Role
This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Not included in the source posting: about the role.
Who can apply
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