Senior Technical Architect

Job Description — Emulation Lead Experience: 10+ Years Domain: ASIC/IP Emulation & Pre-Silicon Validation Platform: Synopsys ZeBu Role Overview We are looking for an experienced Emulation Lead to lead pre-silicon emulation and validation of complex Design IP such as PCIe, DDR, Ethernet, MIPI CSI/DSI and other high-speed interface IPs using the Synopsys ZeBu emulation platform. The candidate will own the end-to-end emulation strategy for assigned IPs, including environment architecture, ZeBu bring-up, test development, protocol and performance validation, debug, regression and verification closure. The role requires strong hands-on technical capability combined with technical leadership and mentoring. Key Responsibilities

• Own end-to-end ZeBu emulation and validation of assigned Design IPs.
• Define scalable IP-level emulation architecture, methodology and verification strategy.
• Compile, partition, map and bring up complex RTL designs on ZeBu.
• Integrate ZeBu transactors, emulation IP, speed adapters and protocol solutions.
• Identify gaps between Design IP verification requirements and available ZeBu/emulation IP capabilities and drive solutions or workarounds.
• Define functional, protocol, corner-case, stress, error-injection and performance validation scenarios.
• Review specifications and verification plans to identify missing scenarios and verification risks.
• Drive validation of IPs such as:

o    PCIe controllers/PHYs, DDR/LPDDR controllers and PHYs o    Ethernet MAC/PCS/PHY, MIPI CSI/DSI etc

• Lead complex debug involving RTL, protocol, transactors, verification environment and ZeBu infrastructure.
• Drive regression automation, results analysis and verification closure.
• Track test, quality and emulation metrics and communicate risks to stakeholders.
• Collaborate with Design, Verification, Architecture and Emulation platform teams across geographies.
• Review technical implementation and mentor engineers on emulation methodology, protocol verification and debug.

Required Technical Skills

• 10+ years of experience in ASIC/SoC design verification, emulation, prototyping or digital design.
• Strong hands-on experience with Synopsys ZeBu or comparable hardware emulation platforms.
• Experience bringing complex RTL IP from initial compilation through stable emulation and regression.
• Strong knowledge of emulation concepts including:

o    Compilation and partitioning o    Transactor-based acceleration o    Clock/reset handling o    Emulation IP integration o    Runtime and performance optimization o    Waveform and transaction-level debug

• Deep expertise in at least one high-speed protocol:

o    PCIe o    DDR/LPDDR o    Ethernet o    MIPI CSI/DSI

• Experience adapting simulation-based verification environments for emulation.
• Experience with protocol VIP/transactor integration.
• Knowledge of functional, protocol, stress, error-recovery and performance validation.
• Experience with C/C++ software-driven validation is desirable.
• Strong scripting/automation skills using Python, Perl, Tcl, shell or equivalent.
• Experience with tools such as VCS, Verdi and ZeBu is preferred.

Leadership Expectations

• Provide technical direction to a team of emulation engineers.
• Own technical deliverables, schedules, risks and verification quality.
• Review test plans and identify missing corner cases.
• Drive root-cause analysis of difficult failures.
• Establish reusable emulation methodologies and best practices.
• Mentor engineers and conduct technical reviews.
• Work effectively with globally distributed, cross-functional engineering teams.
• Communicate complex technical issues and recommendations clearly to senior stakeholders.

Education Bachelor's or Master's degree in Electronics, Electrical Engineering, Computer Engineering, VLSI/Microelectronics, Computer Science or equivalent.