SoC Verification Engineer
About the Team
Position Overview
Key Responsibilities
- Create and update UVM-based test bench generation and test case creation
- Define and develop scalable and reusable block, subsystem, and SoC verification plans
- Create test benches and verification environments that align with microarchitecture specifications
- Execute verification plans, including emulation and system simulation models, to ensure design functionality and uncover bugs
- Debug and root cause issues in presilicon environments, implementing corrective measures to address failures
- Collaborate with architects, RTL developers, postsilicon teams, and physical design teams to improve verification of complex architectural features
- Document and maintain test plans, driving technical reviews with design and architecture teams
- Integrate security coverage activities within test plans, including regression and debug tests
- Maintain and improve existing functional verification infrastructure and methodologies
- Absorb learnings from postsilicon development and incorporate feedback into improved verification strategies.
To Be Successful, You Should Demonstrate the Following
- Ability to work collaboratively across interdisciplinary teams
- Strong communication skills with the ability to work across interdisciplinary teams
- Passion for tackling complex problems and delivering innovative solutions
Minimum Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 7+ years of hands-on experience in SoC design verification, including demonstrated expertise in OVM/UVM methodologies, debugging, and test planning
OR
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 6+ years of hands-on experience in SoC design verification, including demonstrated expertise in OVM/UVM methodologies, debugging, and test planning.
The experience must include
- AMBA protocols such as CHI, AXI, AHB, and APB with industry-standard VIP from various EDA vendors
- Creation and updating of UVM-based test benches and test case creation
Preferred Qualifications
- Experience with postsilicon validation and incorporating feedback into presilicon test plans
- Familiarity with emulation models and system simulation tools for performance analysis
We invite you to bring your expertise and creativity to Intel, where your contributions will make a lasting impact on future technology. Join us and shape the future of computing with your skills and dedication.
Job Type
Shift
Primary Location
Posting Statement
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Not included in the source posting: benefits.
Skills
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