Senior Manager, Analog & Mixed-Signal Design Engineering
About the Role
Senior Manager, Analog & Mixed-Signal Design Engineering
Technical Leadership
- Lead the development and delivery of analog and mixed-signal IP including ADCs, DACs, phase interpolators, voltage regulators, clocking circuits, and other high-performance analog building blocks.
- Drive technical excellence throughout the product lifecycle, including architecture reviews, design execution, verification, silicon bring-up, validation, and product readiness.
- Partner with senior technical leaders to establish technical direction and align organizational priorities with product roadmaps.
- Promote engineering innovation through automation, process optimization, and AI-assisted engineering methodologies.
Program & Execution Leadership
- Develop execution strategies and project plans that enable successful delivery of IP and SoC milestones.
- Manage schedules, resources, risks, dependencies, and deliverables across multiple concurrent development efforts.
- Leverage data-driven insights to communicate progress, support decision-making, and drive successful business outcomes.
- Ensure alignment across geographically distributed teams and stakeholders.
Team Leadership & Talent Development
- Build, lead, and develop a high-performing organization of analog and mixed-signal design engineers.
- Recruit, coach, mentor, and retain top engineering talent.
- Foster an inclusive culture that promotes innovation, collaboration, accountability, and continuous learning.
- Develop future technical and organizational leaders through active coaching and professional development.
Cross-Functional Collaboration
- Partner closely with architecture, design, validation, physical design, layout, product engineering, manufacturing, and program management teams.
- Collaborate across Intel organizations to deliver complete end-to-end solutions and drive successful product outcomes.
- Work with global engineering teams, including collaboration across U.S. and India-based partners, to achieve shared goals and execution milestones.
Organizational Impact
- Drive organizational excellence through strong leadership, execution discipline, and operational rigor.
- Influence strategic decisions while balancing technical, business, and organization priorities.
- Help shape future technology directions that enable Intel's next generation of AI, client, datacenter, and foundry solutions.
Behavioral traits that we are looking for
Strategic Leadership
Talent Development
Collaboration & Influence
Ownership & Accountability
Innovation Mindset
Communication Excellence
Qualifications
Note
This position is not eligible for Intel immigration sponsorship.
Minimum Qualifications and Experience
- Bachelor's degree in Electrical Engineering, Electronics Engineering, or a related field with 9+ years of experience.
- 6+ years of experience in a people leadership, technical leadership, project leadership, or management role within a matrixed organization.
- 8+ years of experience delivering analog or mixed-signal IP from concept through silicon validation and product deployment.
- 7+ years of experience with analog design fundamentals, including noise, jitter, matching, stability, linearity, and/or performance optimization
- 7+ years of experience in silicon bring-up, post-silicon validation, and lab debug of analog circuits.
Preferred Qualifications and Experience
:
- Master's degree in Electrical Engineering, Electronics Engineering, or related field with 6+ years of experience.
- Experience managing analog IP design teams.
- Experience in one or more of the following areas: PLL, CDR, CTLE, DFE, ADC, Transmitter (TX) design, or Receiver (RX) design.
- Knowledgeable about high speed serial IO technologies such as PCIe/CXL and USB Type C and of die to die technologies such as UCIe.
- Building, leading, and driving execution in silicon teams delivering to complex, high-impact programs.
Why Join Intel?
Job Type
Shift
Primary Location
Posting Statement
Benefits
Work Model for this Role
This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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