Physical Design Engineering Graduate Intern

• Support physical design implementation processes, including synthesis, place-and-route, timing analysis, clocking, and/or integration.
• Assist in verification and signoff activities to ensure manufacturability and performance compliance of silicon designs.
• Collaborate with cross-functional teams to enhance design scalability and automation efforts.
• Apply design optimization techniques to improve power, performance, and area efficiency in silicon designs.
• Perform floor planning and clock tree synthesis to achieve robust physical designs.
• Contribute to static timing analysis to meet critical timing constraints for manufacturability.
• Explore innovative solutions for low-power design and power reduction strategies in physical design workflows.
• Embrace continuous learning and problem-solving to support Intel's commitment to advancing technology leadership

• Currently pursuing a master’s degree in electrical engineering or computer engineering, or a related technical specialized field.

3+ months of experience with the following skills:

• Proficiency in physical design tools and flows, including design planning tools, floor planning, and static timing analysis.
• Knowledge of low-power design techniques and power reduction methodologies.
• Familiarity with clock tree synthesis and design optimization principles.

Demonstrated ability to analyze and solve complex technical problems.

Preferred Qualifications:

• Strong communication and collaboration skills to work effectively in cross-functional teams.
• Eagerness to explore and learn about design scalability, automation, and innovative approaches to physical design challenges.
• Passion for continuous improvement and self-driven development in a dynamic environment.
• Ability to adapt to new tools, techniques, and industry trends in silicon design.

We welcome applicants who are excited to contribute their expertise to Intel's success. Join us and begin your journey toward building a meaningful career in physical design engineering

This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.