NVIDIA 2027 Internships: Hardware Design for Test (DFT)

• Must be actively enrolled in a university pursuing either an M.S. or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related field, for the full duration of the internship;

• Design for Test (DFT), Digital Design, Test Architecture and DFT Planning, Static Timing Analysis (STA), Pre-Silicon and Post-Silicon Issue Debug
• Scan Chain Design and ATPG, Boundary Scan and JTA, Memory BIST (Built-In Self-Test), Logic BIST and Compression (EDT, Streaming Scan Network), At-Speed and Delay Testing (verifying the chip works at its rated frequency)

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• Perl, TCL, C, C++, Python, Synopsys, TetraMAX, Cadence Modus, Linux

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Our internship hourly rates are a standard pay based on the position, your location, year in school, degree, and experience. The hourly rate for our interns is 20 USD - 71 USD.
 You will also be eligible for Intern   benefits . ​

Applications are accepted on an ongoing basis. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.