Senior CPU RTL Design Engineer

• Develop and optimize logic design, register transfer level (RTL) coding, and simulation for the CPU.
• Participate in defining the architecture and microarchitecture features of the CPU design.
• Write RTL and optimize logic for power, performance, area, and timing goals.
• Ensure design integrity for physical implementation through effective strategies, tools, and methods.
• Review verification plans to ensure design features are correctly validated and resolve failing RTL tests.
• Document microarchitectural specifications (MAS) for the CPU features.
• Collaborate with SoC customers to ensure seamless integration and high-quality performance of the CPU block

Builds alignment and drives technical decisions through expertise and collaboration.

Intel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life.

• See  Intel Benefits  for more details.

Bachelor's degree in Electrical/Computer Engineering, Computer science or related STEM degree with 7+ years of relevant experience.  Or a Master's degree in the same filed  with 5+ years of experience.

In addition, you must have the following experience:

• 7+ years of experience in RTL design using System Verilog, with strong knowledge of hardware modeling and logic debug environments.
• 5+ years of  experience with energy-efficient and low-power logic design methods, including techniques applicable to high-frequency optimization.
• 5+ years of experience in C lock-domain crossing (CDC), and Power-aware design.
• 3+ years of experience in scripting languages such as TCL, Perl, or Python.

• A PhD in the same fields with 2+ years of experience.
• Knowledge on CPU power-management namely power/electrical budgeting, dynamic voltage and frequency scaling, thermal, P/C states and reset sequence handling.
• Comprehensive knowledge of Intel Architecture ISA and system architecture, including x86 assembly language.
• Experience with high-speed circuit design and optimization, specifically for datapath, circuits, and arrays.
• Familiarity with circuit planning and timing convergence processes.
• Ability to leverage broad understanding of CPU architecture to deliver impactful solutions.
• Proficient with static timing analysis, UPF and lint checks.

Join Intel and be part of a team that is passionate about shaping the future of technology. Apply today and embark on a career journey that makes a difference.

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.

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