Senior CPU RTL Design Engineer – Power Management
About the Role
CPU Design Team
power-efficient, high-performance processors
Senior CPU RTL Design Engineer – Power Management
What You’ll Do
- Define, design, and implement CPU microarchitecture features
- Develop and deliver RTL (SystemVerilog/Verilog) for CPU IP blocks
- Drive power, performance, and area (PPA) optimization, with a strong focus on: • Power-aware RTL design
- Energy-efficient architectures
- Design and validate multi-clock domain and CDC solutions
- Contribute to CPU power management features, including: • Dynamic voltage and frequency scaling (DVFS)
- Power/thermal management
- Reset flows and power state transitions (P/C states)
- Debug complex RTL and collaborate with verification teams
- Partner with SoC integration teams for full-chip delivery
- Contribute to design methodology improvements and scalability
Behavioral Traits that we are looking for
Ownership & Accountability
Depth over keywords
Problem-solving rigor
Collaboration mindset
Technical leadership
Bias for action & urgency
Qualifications
Minimum Qualifications and Experience
You experience mentioned above must be in the following
- Experience with power management concepts (e.g., DVFS, power states, budgeting)
- Experience in low-power / power-aware CPU or SoC RTL design
- RTL development (Verilog/SystemVerilog)
- Debug and system-level design understanding
Preferred Qualifications and Experience
- Experience in multi-clock domain / CDC design
- Comprehensive knowledge of Intel Architecture ISA and system architecture, including x86 assembly language.
- Experience with high-speed circuit design and optimization, specifically for datapath, circuits, and arrays.
- Familiarity with circuit planning and timing convergence processes.
- Ability to leverage broad understanding of CPU architecture to deliver impactful solutions.
- Proficient with static timing analysis, UPF and lint checks.
Job Type
Shift
Primary Location
Additional Locations
Posting Statement
Benefits
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Skills
Who can apply
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