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Apple

Design Verification Lead

Discovered
Apple
Cupertino, CAexternalBusiness OperationsPosted about 8 hours ago (Aug 12, 2026)

About the role

Are you a leader and want to apply your engineering background to make big things happen, and can you influence, connect, get results and communicate effectively while delivering on a predictable and dynamic schedule? The Custom Silicon Management Group provides critical custom silicon for all mobile products including iPhone, iPad, iPod, and AppleTV. We have an extraordinary opportunity for senior level engineers to drive and lead technical engagements between Apple and silicon suppliers working on groundbreaking technologies! We are looking for a remarkable Design Verification Lead to work with multi-functional teams and external vendors to define, develop and productize the next generation of mobile solutions. @@HD@@ Description@@/HD@@ Imagine yourself at the center of our hardware development effort! We collaborate with all teams, playing a strategic role of getting functional products to millions of customers quickly. As a CSM (Custom Silicon Management) DV lead, you will be leading the DV front for vendor silicons (power, display, touch and sensors, accessories). You will manage throughout the entire project phase, from specification, planning, execution, to sign-off. @@HD@@ Responsibilities:@@/HD@@ Work closely with internal & external teams to review specifications, improve DV plans & methodologies, and ensure full verification coverage. Collaborate with design & micro-architecture teams to understand the functional & performance goals of the design. Lead and track DV progress and quality. Review DV architecture, implementation, metrics. Provide technical guidance to planning, execution, and long term technology roadmap. @@HD@@ Preferred Qualifications@@/HD@@ Advanced knowledge of ASIC architecture, design, and verification flow. Expert knowledge of state-of-the-art verification flow and methodology, such as constrained random, functional/code coverage, assertions, GLS. Knowledge of Formal verification, low power verification and analog mixed signal simulation are a plus. Excellent social and communication skills, team spirit, and the passion to take on diverse challenges. @@HD@@ Knowledge of industry standard interfaces. Minimum Qualifications@@/HD@@ BS degree and 10 years of industry experience. @@HD@@ Experience with modern verification languages, including SystemVerilog / UVM . Pay & Benefits@@/HD@@ At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $175,500 and $311,700, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

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Attribution: sourced from Apple's public The Muse board.

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